XCM-107 series Breadboard with Virtex-5 LXT FFG665

FPGA overview XC5VLX30T XC5VLX50T
Slices 4,800 7,200
Logic Cells 30,720 46,080
Maximum Distributed RAM Bits 320 K 480 K
Total Block RAM Bits 1,296 K 2,160 K
Maximum user I / O pins (Device) 360 360
Maximum user I / O pins ( Board ) 128 128
DCMs Four 12
PLLs 2 6
DSP48As 32 48

FPGA overview	XC5VLX30T	XC5VLX50T
Slices	4,800	7,200
Logic Cells	30,720	46,080
Maximum Distributed RAM Bits	320 K	480 K
Total Block RAM Bits	1,296 K	2,160 K
Maximum user I / O pins (Device)	360	360
Maximum user I / O pins ( Board )	128	128
DCMs	Four	12
PLLs	2	6
DSP48As	32	48

　■ Equipped with XC5VLX30T-1FFG665C or XC5VLX50T-1FFG665C
　 ■ Abundant I / O extraction (128)
　 ■ Equipped with large capacity SPI flash ROM (ISP possible with iMPACT)
　 ■ Onboard clock
　　　30MHz, 50MHz (LVTTL)
　 ■ Rocket IOevaluation Possible TX / RX: 2 sets (125MHz, 150MHz, LVDS reference clock installed)
　　　 125 / 150MHz and communication standard
　■ Equippedwith 7-pin JTAG connector that allows configuration to FPGA and ISP to ROM
　 ■ Stable with JTAG Buffer circuit Realized download
　 ■ 3.3V single power supply operation
　　　1.0V, 1.2V, 2.5V generated in the board
　 ■ VCCO can be used separately for one system (tested at 3.3V at the time of manufacture)
　 ■ Reset function for configuration
　 ■ Half card size 　　　54mmX43mm RoHS directive compliant